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M
FEATURES
24LC01B/02B
PACKAGE TYPES
PDIP, SOIC A0 A1 A2 Vss 1 24LC01B/02B 2 3 4 8 7 6 5 VCC WP SCL SDA
1K/2K 2.5V I2CTM Serial EEPROM
* Single supply with operation down to 2.5V * Low power CMOS technology - 1 mA active current typical - 10 A standby current typical at 5.5V - 5 A standby current typical at 3.0V * Organized as a single block of 128 bytes (128 x 8) -1K or 256 bytes (256 x 8) -2K * 2-wire serial interface bus, I2CTM compatible * Schmitt trigger inputs for noise suppression * 100 kHz (E-temp.) and 400 kHz (C/I-temp.) compatibility * Self-timed write cycle (including auto-erase) * Page-write buffer for up to 8 bytes * 2 ms typical write cycle time for page-write * Hardware write protect for entire memory * Can be operated as a serial ROM * ESD protection > 3,000V * 1,000,000 E/W cycles ensured * Data retention > 200 years * 8-pin DIP, SOIC, TSSOP or SOT-23* package * Available for temperature ranges - Commercial (C): 0C to +70C - Industrial (I): -40C to +85C - Automotive (E): -40C to +125C
TSSOP A0 A1 A2 VSS MSOP A0 A1 A2 VSS SOT-23*
24LC01B/02B
1 2 3 4
8 7 6 5
VCC WP SCL SDA
24LC01B/02B
1 2 3 4
8 7 6 5
VCC WP SCL SDA
SCL VSS SDA
1 2 3
5
WP
24LC01B
DESCRIPTION
The Microchip Technology Inc. 24LC01B and 24LC02B are 1 Kbit and 2 Kbit Electrically Erasable PROMs (EEPROMs). The devices are organized as a single block of 128 x 8-bit or 256 x 8-bit memory with a 2-wire serial interface. Low voltage design permits operation down to 2.5 volts with a standby and active currents of only 5 A and 1 mA respectively. The 24LC01B and 24LC02B also have page-write capability for up to 8 bytes of data. The 24LC01B and 24LC02B are available in the standard 8-pin DIP, 8-lead surface mount SOIC, MSOP and TSSOP packages. The SOT-23 package is available for the 24LC01B.
4
VCC
Note: A0, A1 and A2 are not used *Available for 24LC01B only
BLOCK DIAGRAM
WP HV GENERATOR
I/O CONTROL LOGIC
MEMORY CONTROL LOGIC
XDEC
EEPROM ARRAY PAGE LATCHES
SDA
SCL YDEC
*Available for 24LC01B only
VCC VSS I2C is a trademark of Philips Corporation. SENSE AMP R/W CONTROL
2001 Microchip Technology Inc.
DS20071K-page 1
24LC01B/02B
1.0
1.1
ELECTRICAL CHARACTERISTICS
Maximum Ratings*
TABLE 1-1:
Name VSS SDA SCL WP VCC A0, A1, A2
PIN FUNCTION TABLE
Function Ground Serial Address/Data I/O Serial Clock Write Protect Input +2.5V to 5.5V Power Supply No Internal Connection
VCC........................................................................7.0V All inputs and outputs w.r.t. VSS .....-0.6V to VCC +1.0V Storage temperature ..........................-65C to +150C Ambient temp. with power applied .....-65C to +125C Soldering temperature of leads (10 seconds) .. +300C ESD protection on all pins ................................. > 3 KV
*Notice: Stresses above those listed under "Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-2:
DC CHARACTERISTICS
Commercial (C): TAMB = 0C to +70C Industrial (I): TAMB = -40C to +85C Automotive (E): TAMB = -40C to +125C Symbol VIH VIL VHYS VOL ILI ILO CIN, COUT ICC Write ICC Read ICCS Min. .7 VCC -- .05 VCC -- -10 -10 -- -- -- -- -- Max. -- .3 VCC -- .40 10 10 10 3 1 30 100 Units V V V V A A pF mA mA A A -- -- (Note) IOL = 3.0 mA, VCC = 2.5V VIN = 0.1V to 5.5V VOUT = 0.1V to 5.5V VCC = 5.0V (Note) TAMB = 25C, FCLK = 1 MHz VCC = 5.5V, SCL = 400 kHz -- VCC = 3.0V, SDA = SCL = VCC VCC = 5.5V, SDA = SCL = VCC WP = VSS Conditions
VCC = +2.5V to +5.5V Parameter WP, SCL and SDA pins: High level input voltage Low level input voltage Hysteresis of Schmidt trigger inputs Low level output voltage Input leakage current Output leakage current Pin capacitance (all inputs/outputs) Operating current Standby current
Note:
This parameter is periodically sampled and not 100% tested.
FIGURE 1-1:
BUS TIMING START/STOP
VHYS
SCL TSU:STA SDA THD:STA TSU:STO
START
STOP
DS20071K-page 2
2001 Microchip Technology Inc.
24LC01B/02B
TABLE 1-3: AC CHARACTERISTICS
Commercial (C): Industrial (I): Automotive (E): Symbol FCLK THIGH TLOW TR TF THD:STA TSU:STA THD:DAT TSU:DAT TSU:STO TAA TBUF Min -- -- 600 4000 1300 4700 -- -- -- 600 4000 600 4700 0 100 250 600 4000 -- -- 1300 4700 20+0.1CB -- -- -- 1M TAMB = 0C to +70C TAMB = -40C to +85C TAMB = -40C to 125C Max 400 100 -- -- -- -- 300 1000 300 -- -- -- -- -- -- -- -- -- 900 3500 -- -- 250 250 50 5 -- Units kHz ns ns ns ns ns ns ns ns ns ns ns Conditions 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V (Note 1) 2.5V VCC 5.5V (E-temp. range) (Note 1) (Note 1) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) (Note 2) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp.range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V 2.5V VCC 5.5V (E-temp. range) 4.5V VCC 5.5V (Note 1) 2.5V VCC 5.5V (E-temp. range) (Note 1) (Notes 1 and 3)
VCC = +2.5V to 5.5V Parameter Clock frequency Clock high time Clock low time SDA and SCL rise time (Note 1) SDA and SCL fall time START condition hold time START condition setup time Data input hold time Data input setup time STOP condition setup time Output valid from clock (Note 2) Bus free time: Time the bus must be free before a new transmission can start Output fall time from VIH minimum to VIL maximum Input filter spike suppression (SDA and SCL pins) Write cycle time (byte or page) Endurance
TOF TSP TWC
ns ns ms cycles
--
25C, VCC = 5.0V, Block Mode (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF. 2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions. 3: The combined TSP and VHYS specifications are due to new Schmitt trigger inputs which provide improved noise spike suppression. This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on Microchip's website: www.microchip.com.
2001 Microchip Technology Inc.
DS20071K-page 3
24LC01B/02B
FIGURE 1-2: BUS TIMING DATA
TF THIGH TLOW SCL TSU:STA SDA IN THD:STA TSP TAA SDA OUT THD:STA THD:DAT TSU:DAT TSU:STO TR
TAA
TBUF
DS20071K-page 4
2001 Microchip Technology Inc.
24LC01B/02B
2.0 FUNCTIONAL DESCRIPTION
3.4 Data Valid (D)
The 24LC01B/02B supports a bi-directional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as transmitter and if receiving data, as receiver. The bus has to be controlled by a master device which generates the serial clock (SCL), controls the bus access and generates the START and STOP conditions, while the 24LC01B/02B works as slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. The state of the data line represents valid data when, after a START condition, the data line is stable for the duration of the HIGH period of the clock signal. The data on the line must be changed during the LOW period of the clock signal. There is one clock pulse per bit of data. Each data transfer is initiated with a START condition and terminated with a STOP condition. The number of the data bytes transferred between the START and STOP conditions is determined by the master device and is theoretically unlimited, although only the last sixteen will be stored when doing a write operation. When an overwrite does occur it will replace data in a first in first out fashion.
3.0
BUS CHARACTERISTICS
The following bus protocol has been defined: * Data transfer may be initiated only when the bus is not busy * During data transfer, the data line must remain stable whenever the clock line is HIGH. Changes in the data line while the clock line is HIGH will be interpreted as a START or STOP condition Accordingly, the following bus conditions have been defined (Figure 3-1).
3.5
Acknowledge
Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24LC01B/02B does not generate any acknowledge bits if an internal programming cycle is in progress.
3.1
Bus Not Busy (A)
Both data and clock lines remain HIGH.
3.2
Start Data Transfer (B)
A HIGH to LOW transition of the SDA line while the clock (SCL) is HIGH determines a START condition. All commands must be preceded by a START condition.
3.3
Stop Data Transfer (C)
A LOW to HIGH transition of the SDA line while the clock (SCL) is HIGH determines a STOP condition. All operations must be ended with a STOP condition.
The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. A master must signal an end of data to the slave by not generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave must leave the data line HIGH to enable the master to generate the STOP condition.
FIGURE 3-1:
(A) SCL (B)
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(D) (D) (C) (A)
SDA
START CONDITION
ADDRESS OR DATA ACKNOWLEDGE ALLOWED VALID TO CHANGE
STOP CONDITION
2001 Microchip Technology Inc.
DS20071K-page 5
24LC01B/02B
3.6 Device Address
4.0
4.1
WRITE OPERATION
Byte Write
The 24LC01B/02B are software-compatible with older devices such as 24C01A, 24C02A, 24LC01 and 24LC02. A single 24LC02B can be used in place of two 24LC01's, for example, without any modifications to software. The "chip select" portion of the control byte becomes a `don't care'. After generating a START condition, the bus master transmits the slave address consisting of a 4-bit device code (1010) for the 24LC01B/02B, followed by three `don't care' bits. The eighth bit of slave address determines if the master device wants to read or write to the 24LC01B/02B (Figure 3-2). The 24LC01B/02B monitors the bus for its corresponding slave address all the time. It generates an acknowledge bit if the slave address was true and it is not in a programming mode. Operation Read Write Control Code 1010 1010 Chip Select XXX XXX R/W 1 0
Following the start signal from the master, the device code (4 bits), the don't care bits (3 bits) and the R/W bit, which is a logic LOW is placed onto the bus by the master transmitter. This indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an acknowledge bit, during the ninth clock cycle. Therefore, the next byte transmitted by the master is the word address and will be written into the address pointer of the 24LC01B/02B. After receiving another acknowledge signal from the 24LC01B/02B, the master device will transmit the data word to be written into the addressed memory location. The 24LC01B/ 02B acknowledges again and the master generates a stop condition. This initiates the internal write cycle. During this time, the 24LC01B/02B will not generate acknowledge signals (Figure 4-1).
4.2
Page Write
FIGURE 3-2:
START
CONTROL BYTE ALLOCATION
READ/WRITE
SLAVE ADDRESS
R/W
A
1
0
1
0
X
X
X
X = `Don't care'
The write control byte, word address and the first data byte are transmitted to the 24LC01B/02B in the same way as in a byte write. But instead of generating a stop condition, the master transmits up to eight data bytes to the 24LC01B/02B. They are temporarily stored in the on-chip page buffer and will be written into the memory after the master has transmitted a stop condition. After the receipt of each word, the three lower order address pointer bits are internally incremented by one. The higher order five bits of the word address remains constant. If the master should transmit more than eight words prior to generating the stop condition, the address counter will roll over and the previously received data will be overwritten. As with the byte write operation, once the stop condition is received an internal write cycle will begin (Figure 4-2). Note: Page write operations are limited to writing bytes within a single physical page, regardless of the number of bytes actually being written. Physical page boundaries start at addresses that are integer multiples of the page buffer size (or `page size') and end at addresses that are integer multiples of [page size - 1]. If a page write command attempts to write across a physical page boundary, the result is that the data wraps around to the beginning of the current page (overwriting data previously stored there), instead of being written to the next page as might be expected. It is therefore necessary for the application software to prevent page write operations that would attempt to cross a page boundary.
DS20071K-page 6
2001 Microchip Technology Inc.
24LC01B/02B
FIGURE 4-1:
BUS ACTIVITY MASTER
BYTE WRITE
S T A R T S A C K A C K A C K CONTROL BYTE WORD ADDRESS DATA S T O P P
SDA LINE
BUS ACTIVITY
FIGURE 4-2:
BUS ACTIVITY MASTER
PAGE WRITE
S T A R T S A C K A C K A C K A C K A C K CONTROL BYTE WORD ADDRESS (n) S T O P P
DATA (n)
DATA (n + 1)
DATA (n + 7)
SDA LINE
BUS ACTIVITY
2001 Microchip Technology Inc.
DS20071K-page 7
24LC01B/02B
5.0 ACKNOWLEDGE POLLING 7.0 READ OPERATION
Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the stop condition for a write command has been issued from the master, the device initiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master sending a start condition followed by the control byte for a write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If the cycle is complete, then the device will return the ACK and the master can then proceed with the next read or write command. See Figure 5-1 for flow diagram. Read operations are initiated in the same way as write operations with the exception that the R/W bit of the slave address is set to `1'. There are three basic types of read operations: current address read, random read and sequential read.
7.1
Current Address Read
FIGURE 5-1:
ACKNOWLEDGE POLLING FLOW
Send Write Command
The 24LC01B/02B contains an address counter that maintains the address of the last word accessed, internally incremented by one. Therefore, if the previous access (either a read or write operation) was to address n, the next current address read operation would access data from address n + 1. Upon receipt of the slave address with R/W bit set to `1', the 24LC01B/ 02B issues an acknowledge and transmits the eight bit data word. The master will not acknowledge the transfer but does generate a stop condition and the 24LC01B/02B discontinues transmission (Figure 7-1).
7.2
Random Read
Send Stop Condition to Initiate Write Cycle
Send Start
Send Control Byte with R/W = 0
Random read operations allow the master to access any memory location in a random manner. To perform this type of read operation, first the word address must be set. This is done by sending the word address to the 24LC01B/02B as part of a write operation. After the word address is sent, the master generates a start condition following the acknowledge. This terminates the write operation, but not before the internal address pointer is set. Then the master issues the control byte again but with the R/W bit set to a `1'. The 24LC01B/ 02B will then issue an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer but does generate a stop condition and the 24LC01B/02B discontinues transmission (Figure 7-2). No
Did Device Acknowledge (ACK = 0)? Yes Next Operation
7.3
Sequential Read
Sequential reads are initiated in the same way as a random read except that after the 24LC01B/02B transmits the first data byte, the master issues an acknowledge as opposed to a stop condition in a random read. This directs the 24LC01B/02B to transmit the next sequentially addressed 8-bit word (Figure 7-3). To provide sequential reads the 24LC01B/02B contains an internal address pointer which is incremented by one at the completion of each operation. This address pointer allows the entire memory contents to be serially read during one operation.
6.0
WRITE PROTECTION
The 24LC01B/02B can be used as a serial ROM when the WP pin is connected to VCC. Programming will be inhibited and the entire memory will be write-protected.
7.4
Noise Protection
The 24LC01B/02B employs a VCC threshold detector circuit which disables the internal erase/write logic if the VCC is below 1.5 volts at nominal conditions. The SCL and SDA inputs have Schmitt trigger and filter circuits which suppress noise spikes to assure proper device operation even on a noisy bus.
DS20071K-page 8
2001 Microchip Technology Inc.
24LC01B/02B
FIGURE 7-1: CURRENT ADDRESS READ
S T A R T S A C K N O A C K CONTROL BYTE S T O P P BUS ACTIVITY MASTER
DATA (n)
SDA LINE BUS ACTIVITY
FIGURE 7-2:
RANDOM READ
CONTROL BYTE WORD ADDRESS (n) S T A R T S A C K A C K A C K N O A C K CONTROL BYTE S T O P P
S T BUS ACTIVITY A MASTER R T SDA LINE BUS ACTIVITY S
DATA (n)
FIGURE 7-3:
SEQUENTIAL READ
DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X) S T O P P A C K A C K A C K A C K N O A C K
BUS ACTIVITY CONTROL BYTE MASTER SDA LINE BUS ACTIVITY
8.0
8.1
PIN DESCRIPTIONS
SDA Serial Address/Data Input/ Output
8.3
WP
This pin must be connected to either VSS or VCC. If tied to VSS, normal memory operation is enabled (read/write the entire memory). If tied to VCC, WRITE operations are inhibited. The entire memory will be write-protected. Read operations are not affected. This feature allows the user to use the 24LC01B/02B as a serial ROM when WP is enabled (tied to VCC).
This is a bi-directional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal. Therefore, the SDA bus requires a pullup resistor to VCC (typical 10k for 100 kHz, 2k for 400 kHz). For normal data transfer SDA is allowed to change only during SCL LOW. Changes during SCL HIGH are reserved for indicating the START and STOP conditions.
8.4
A0, A1, A2
These pins are not used by the 24LC01B/02B. They may be left floating or tied to either VSS or VCC.
8.2
SCL Serial Clock
This input is used to synchronize the data transfer from and to the device.
2001 Microchip Technology Inc.
DS20071K-page 9
24LC01B/02B
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW
Example 24LC01B XXXXXNNN 0025
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN
Example 24LC01B XXXX0025 NNN
5-Lead SOT-23 (24LC01B only)
Example
XXNN
MINN
8-Lead TSSOP XXXX XYWW NNN
Example 4LIB IYWW NNN
8-Lead MSOP XXXXX YWWNNN
Example 4LIBI YWWNNN
Legend: XX...X Y YY WW NNN Note:
Customer specific information* Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information.
*
Standard PICmicro device marking consists of Microchip part number, year code, week code and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price.
DS20071K-page 10
2001 Microchip Technology Inc.
24LC01B/02B
8-Lead Plastic Dual In-line (P) - 300 mil (PDIP)
E1
D 2 n 1
E
A
A2
c
L A1
B1 p eB B
Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L c B1 B eB
MIN
INCHES* NOM 8 .100 .155 .130 .313 .250 .373 .130 .012 .058 .018 .370 10 10
MAX
MIN
.140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5
.170 .145 .325 .260 .385 .135 .015 .070 .022 .430 15 15
MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10
MAX
4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018
2001 Microchip Technology Inc.
DS20071K-page 11
24LC01B/02B
8-Lead Plastic Small Outline (SN) - Narrow, 150 mil (SOIC)
E E1
p
D 2 B n 1
h 45x
c A A2
f
L
A1
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D h L f c B
MIN
.053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0
INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12
MAX
MIN
.069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15
MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12
MAX
1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057
DS20071K-page 12
2001 Microchip Technology Inc.
24LC01B/02B
8-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm (TSSOP)
E E1 p
D 2 1 n B
A c
f
A1
A2
L
Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic
Units Dimension Limits n p A A2 A1 E E1 D L f c B
MIN
INCHES NOM 8 .026
MAX
MIN
.033 .002 .246 .169 .114 .020 0 .004 .007 0 0
.035 .004 .251 .173 .118 .024 4 .006 .010 5 5
.043 .037 .006 .256 .177 .122 .028 8 .008 .012 10 10
MILLIMETERS* NOM MAX 8 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 2.90 3.00 3.10 0.50 0.60 0.70 0 4 8 0.09 0.15 0.20 0.19 0.25 0.30 0 5 10 0 5 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086
2001 Microchip Technology Inc.
DS20071K-page 13
24LC01B/02B
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
E E1
p B p1 D
n
1
c A A2
L
A1
Units Dimension Limits n Number of Pins p Pitch p1 Outside lead pitch (basic) Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter Significant Characteristic A A2 A1 E E1 D L c B
MIN
INCHES* NOM 5 .038 .075 .046 .043 .003 .110 .064 .116 .018 5 .006 .017 5 5
MAX
MIN
.035 .035 .000 .102 .059 .110 .014 0 .004 .014 0 0
.057 .051 .006 .118 .069 .122 .022 10 .008 .020 10 10
MILLIMETERS NOM 5 0.95 1.90 0.90 1.18 0.90 1.10 0.00 0.08 2.60 2.80 1.50 1.63 2.80 2.95 0.35 0.45 0 5 0.09 0.15 0.35 0.43 0 5 0 5
MAX
1.45 1.30 0.15 3.00 1.75 3.10 0.55 10 0.20 0.50 10 10
Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC Equivalent: MO-178 Drawing No. C04-091
DS20071K-page 14
2001 Microchip Technology Inc.
24LC01B/02B
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E E1
p
D 2 B n 1
A
A2
c
A1
(F)
L
Units Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint (Reference) Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Significant Characteristic Notes: Dimension Limits n p A A2 A1 E E1 D L F c B .030 .002 .184 .114 .114 .016 .035 0 .004 .010 MIN
INCHES NOM 8 .026 .044 .034 .193 .118 .118 .022 .037 .006 .012 7 7 .038 .006 .200 .122 .122 .028 .039 6 .008 .016 MAX MIN
MILLIMETERS* NOM 0.65 1.18 0.76 0.05 4.67 2.90 2.90 0.40 0.90 0 0.10 0.25 0.15 0.30 7 7 4.90 3.00 3.00 0.55 0.95 0.86 0.97 0.15 .5.08 3.10 3.10 0.70 1.00 6 0.20 0.40 MAX 8
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. Drawing No. C04-111
2001 Microchip Technology Inc.
DS20071K-page 15
24LC01B/02B
ON-LINE SUPPORT
Microchip provides on-line support on the Microchip World Wide Web (WWW) site. The web site is used by Microchip as a means to make files and information easily available to customers. To view the site, the user must have access to the Internet and a web browser, such as Netscape(R) or Microsoft(R) Explorer. Files are also available for FTP download from our FTP site.
Systems Information and Upgrade Hot Line
The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products. Plus, this line provides information on how customers can receive any currently available upgrade kits.The Hot Line Numbers are: 1-800-755-2345 for U.S. and most of Canada, and 1-480-792-7302 for the rest of the world.
Connecting to the Microchip Internet Web Site
The Microchip web site is available by using your favorite Internet browser to attach to: www.microchip.com The file transfer site is available by using an FTP service to connect to: ftp://ftp.microchip.com The web site and file transfer site provide a variety of services. Users may download files for the latest Development Tools, Data Sheets, Application Notes, User's Guides, Articles and Sample Programs. A variety of Microchip specific business information is also available, including listings of Microchip sales offices, distributors and factory representatives. Other data available for consideration is: * Latest Microchip Press Releases * Technical Support Section with Frequently Asked Questions * Design Tips * Device Errata * Job Postings * Microchip Consultant Program Member Listing * Links to other useful web sites related to Microchip Products * Conferences for products, Development Systems, technical information and more * Listing of seminars and events
DS20071K-page 16
2001 Microchip Technology Inc.
24LC01B/02B
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-7578. Please list the following information, and use this outline to provide us with your comments about this Data Sheet. To: RE: Technical Publications Manager Reader Response Total Pages Sent
From: Name Company Address City / State / ZIP / Country Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Device: 24LC01B/02B Questions: 1. What are the best features of this document? Y N Literature Number: DS20071K FAX: (______) _________ - _________
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this data sheet easy to follow? If not, why?
4. What additions to the data sheet do you think would enhance the structure and subject?
5. What deletions from the data sheet could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
8. How would you improve our software, systems, and silicon products?
2001 Microchip Technology Inc.
DS20071K-page 17
24LC01B/02B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X /XX XXX Pattern Examples: a) b) Device: 24LC01B: VDD range 1.8V to 5.5V 24LC01BT: (Tape and Reel) 24LC02B: VDD range 2.5V to 5.5V 24LC02BT: (Tape and Reel) I E P SN OT ST MS = = = = = = = = 0C to+70C -40C to+85C -40C to+125C Plastic DIP (300 mil body), 8-lead Plastic SOIC (150 mil body), 8-lead SOT-23, 5-lead (24LC01B only) TSSOP, 8-lead MSOP, 8-lead c) 24LC01B-I/P Industrial Temp., PDIP package, normal VDD limits. 24LC02B/SN Commercial Temp., SOIC package, normal VDD limits. 24LC01B-I/OT Industrial Temp., SOT-23 package, normal VDD limits. (Tape and Reel only)
Temperature Package Range
Temperature Range:
Package:
Sales and Support
Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
DS20071K-page 18
2001 Microchip Technology Inc.
24LC01B/02B
"All rights reserved. Copyright (c) 2001, Microchip Technology Incorporated, USA. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights."
Trademarks The Microchip name, logo, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, KEELOQ, SEEVAL, MPLAB and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Total Endurance, ICSP, In-Circuit Serial Programming, FilterLab, MXDEV, microID, FlexROM, fuzzyLAB, MPASM, MPLINK, MPLIB, PICDEM, ICEPIC, Migratable Memory, FanSense, ECONOMONITOR, Select Mode and microPort are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Term Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2001, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified.
2001 Microchip Technology Inc.
DS20071K-page 19
M
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com
New York
150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335
ASIA/PACIFIC (continued)
Korea
Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea Tel: 82-2-554-7200 Fax: 82-2-558-5934
San Jose
Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955
Rocky Mountain
2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-7456
Singapore
Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850
Toronto
6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509
Atlanta
500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307
Taiwan
Austin
Analog Product Sales 8303 MoPac Expressway North Suite A-201 Austin, TX 78759 Tel: 512-345-2030 Fax: 512-345-6085
ASIA/PACIFIC
Australia
Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Microchip Technology Taiwan 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Boston
2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821
EUROPE
Denmark
Microchip Technology Denmark ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910
China - Beijing
Microchip Technology Beijing Office Unit 915 New China Hong Kong Manhattan Bldg. No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104
Boston
Analog Product Sales Unit A-8-1 Millbrook Tarry Condominium 97 Lowell Road Concord, MA 01742 Tel: 978-371-6400 Fax: 978-371-0050
China - Shanghai
Microchip Technology Shanghai Office Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
France
Arizona Microchip Technology SARL Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
Chicago
333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075
Dallas
4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924
Hong Kong
Microchip Asia Pacific RM 2101, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431
Germany
Arizona Microchip Technology GmbH Gustav-Heinemann Ring 125 D-81739 Munich, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44
Dayton
Two Prestige Place, Suite 130 Miamisburg, OH 45342 Tel: 937-291-1654 Fax: 937-291-9175
Germany
Analog Product Sales Lochhamer Strasse 13 D-82152 Martinsried, Germany Tel: 49-89-895650-0 Fax: 49-89-895650-22
India
Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062
Detroit
Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260
Italy
Arizona Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883
Los Angeles
18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338
Japan
Microchip Technology Intl. Inc. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122
Mountain View
Analog Product Sales 1300 Terra Bella Avenue Mountain View, CA 94043-1836 Tel: 650-968-9241 Fax: 650-967-1590
United Kingdom
Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820
01/30/01
All rights reserved. (c) 2001 Microchip Technology Incorporated. Printed in the USA. 4/01
Printed on recycled paper.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, except as maybe explicitly expressed herein, under any intellectual property rights. The Microchip logo and name are registered trademarks of Microchip Technology Inc. in the U.S.A. and other countries. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.
DS20071K-page 20
2001 Microchip Technology Inc.

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